From 2 to 4 July, PDS Group members Eusebio Rodrigo, Miquel Vellvehi, and José Rebollo participated in the XXXII Seminario Anual de Automática, Electrónica Industrial e Instrumentación (SAAEI 2025), held in Aranjuez, Spain. Eusebio Rodrigo presented a contribution entitled “Simulation of SEB-Resistant VDMOS Transistors”. This study explores the implementation of a buffer layer in a 60V silicon VDMOS device with a 24 μm unit cell to enhance Single Event Burnout (SEB) resistance while preserving key electrical parameters. TCAD simulations are employed, with ion properties derived from geostationary radiation environments, SRIM range calculations, and semi-empirical models of radial energy distribution.